2nd Multicore World – 19, 20 February 2013

Wellington Town Hall, Wellington, New Zealand


Full program with schedule, abstracts and bio, updated February 4, 2013

Full Program Multicore World 2013 (download PDF)

Monday 18 February


Parallel Programming with OpenMP.

Tim Mattson, Intel (Download Outline)

Tuesday 19, Wednesday 20 February


How to grow the economy by 10% per year

Professor Ian Foster. Arthur Holly Compton Distinguished Service Professor of Computer Science at the University of Chicago & Argonne Distinguished Fellow at Argonne National Laboratory. USA

Massive Parallel Processing in the Varnish software

Poul-Henning Kamp. Chief Architect, Varnish Software & Author (of a lot of) FreeBSD. Denmark.

The Varnish HTTP accelerator was written to show what modern MPP hardware with a modern UNIX kernel is capable of, if you stop programming like it was still the 1970-ies -as 90% of programmers worldwide still do. The answer is north of 1 million webpages per second, per machine.

Poul-Henning will talk about what Varnish taught a UNIX kernel programmer with 25 years under his belt about multiprogramming, and will share his tricks and suggestions for writing good MPP programs (that could dramatically change how you write software from now)

Bare-Metal Multicore Performance in a General-Purpose OS

Paul McKenney. IBM Distinguished Engineer & Linux CTO, IBM Academy of Technology. USA

A constant refrain over the decades from database, high-performance computing (HPC), and real-time developers has been: “Can’t you just get the kernel out of the way?”. Recent developments in the Linux kernel are paving the way to just that ideal: Linux is there whenever you need it, but if you follow a few simple rules, it is completely out of your way when you don’t need it.

This adaptive-idle approach will provide bare-metal multicore performance and scalability to databases as well as to HPC and real-time applications. However, it is at the same time able to improve energy efficiency for upcoming asymmetric multicore systems, allowing these systems to better support workloads with extreme peak-to-mean utilization ratios. This talk will describe how this feat is accomplished and how it may best be used.

The revolution in your pocket:

Invisible computers with Dissociative Identity Disorder

Tim Mattson. Intel Principal Engineer, Khronos OpenCL Group. USA

Predicting the future is hard; especially when it hasn’t happened yet. This is especially true in the computer industry. If you pay close attention to hardware trends and emerging software standards, however, you can sketch out the high level details of where we are going.

We will discuss this future in this talk and explore the consequences of the fact that: (1) computers are becoming invisible and (2) they have developed dissociative identity disorder. This is great for hardware designers. Software developers, however, will have their work cut out for them as they adapt to this brave new world.

Transactional memory hardware, algorithms, and C++ language features.

Mark Moir. Oracle, USA – New Zealand

Transactional memory (TM) aims to make it significantly easier to develop multicore programs that are scalable, efficient, and correct.

This talk will introduce TM, and discuss recent efforts towards standardization of language features in C++ for exploiting it. We will also touch on hardware transactional memory, its use to simplify and improve tricky concurrent algorithms, and its relationship to transactional language features such as those being proposed for C++.

The (massive) opportunities of a Multicore World

Professor Barbara Chapman.OpenMP Architecture Review Board & University of Houston. USA

Multicore technology is everywhere! Multicore processors are increasing the computational power available to high-end technical calculations in supercomputers and to embedded systems alike. They are being used to reduce database response times in social networking services and to create high-end medical devices as well as to validate astrophysical theory. Yet to take advantage of the parallelism of such platforms, suitable programming standards are essential.

OpenMP has established itself as a programming model with productivity benefits that offers a portable means to express shared memory parallel computations. It is being extended to increase the range of applications and systems that it can support. The Multicore Association is creating new standards for embedded system development that intend to facilitate the use of multicore platforms in this area too. In this presentation, we discuss the status of these efforts and their application in different industries, and how the broad adoption of these standards might be a game changer.


Do we have winners in a Multicore World?

Moderator: Nicolas Erdody. Open Parallel, New Zealand

In the next 10-15 years, there will be huge opportunities to translate sequential programming (‘traditional’) legacy code, and to create new software that takes full advantage of thousands of cores in the next generation of chips. Keynote speakers and the Audience will discuss who is better positioned today to take advantage of this paradigm shift



Dave Fellows. CTO, GreenButton, USA – New Zealand

Programming heterogeneous computers: a look at OpenCL, CUDA, OpenACC, and the OpenMP accelerator directives

Tim Mattson. Intel, USA

Remote Procedure Call (RPC) considered harmful

Simon Spacey. University of Waikato, New Zealand

(Re) Designed for High Performance: Solaris and Multi-Core Systems

James C. McPherson. Oracle, Australia

AutoCloud: Scalable Client-Side Replication

Christian Rolf. Corvid – Open Parallel, New Zealand

Multicore COBOL: Three approaches

Richard O’Keefe. University of Otago, New Zealand

Big data and Networked Infrastructure

Joe Gamman. Cement & Concrete Association of New Zealand (CCANZ)

Heterogeneous Parallel Computing with Kepler and CUDA5

TN Chan. Compucon, New Zealand

Multicore scores and resource optimisation within the Galaxy Project

David Eyers. University of Otago, New Zealand

An Eclipse plugin for object-oriented parallel programming with Pyjama

Vikas Singh, Nasser Giacaman, Oliver Sinnen. University of Auckland, New Zealand


 Monday 18 February

  • Workshop with Tim Mattson
  • Business and Networking meetings at New Zealand Trade & Enterprise (NZTE)
  • Speakers’ Cocktail

Tuesday 19 February – Conference Day 1

  • Conference Registration
  • Conference Dinner – Wellington Town Hall

Wednesday 20 February – Conference Day 2

  • Networking – Wellington Town Hall
  • Conference Closure – Drinks and Nibbles – Wellington Town Hall

Thursday 21 and Friday 22 February

  • Follow-up business meetings and networking – NZTE

10 December 2012

NOTE: Titles and abstracts are a work in progress and are an indication of the level of the conference: Guest and Keynote Speakers will present the latest innovation in the field and their updated thinking by the time of the conference. This is a draft program and will be updated in January and February. More speakers could be added plus specialised panels and events for audience participation. Final version will be released on Monday 4 February 2013. Multicore World organisation does not assume any liability if for any circumstance a Speaker cannot be present at the conference. Regular updates appear in www.MulticoreWorld.com